library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;

entity hamcorr is
  port (
	DU: IN STD_LOGIC_VECTOR (1 to 7);
	DC: OUT STD_LOGIC_VECTOR (1 to 7);
    NOERROR: OUT STD_LOGIC	
	);
end hamcorr;

architecture hamcorr of hamcorr is

function syndrome (D: STD_LOGIC_VECTOR)
    return STD_LOGIC_VECTOR is
  variable SYN: STD_LOGIC_VECTOR (2 downto 0);
begin
  SYN(0) := D(1) xor D(3) xor D(5) xor D(7);
  SYN(1) := D(2) xor D(3) xor D(6) xor D(7);
  SYN(2) := D(4) xor D(5) xor D(6) xor D(7);
  return(SYN);
end syndrome;

begin
process (DU)
  variable SYN: STD_LOGIC_VECTOR (2 downto 0);
  variable i: INTEGER;
  begin
    DC <= DU;
    i := CONV_INTEGER(syndrome(DU));
    if i = 0 then NOERROR <= '1';
    else NOERROR <= '0'; DC(i) <= not DU(i); end if;
  end process;    
end hamcorr;