LCANET, 6
PROG, Synopsys, FPGA Express, v2.1, Build 2.1.2.23.7.1998
SYM, C0, XOR2, LIBVER=2.0.0
PIN, O, O, S<0>, , 
PIN, I1, I, syn213, , 
PIN, I0, I, CI, , 
END
SYM, C1, XOR2, LIBVER=2.0.0
PIN, O, O, S<1>, , 
PIN, I1, I, syn61, , 
PIN, I0, I, syn280, , 
END
SYM, C2, OR2, LIBVER=2.0.0
PIN, O, O, syn61, , 
PIN, I1, I, syn273, , 
PIN, I0, I, syn261, , 
END
SYM, C3, AND2, LIBVER=2.0.0
PIN, O, O, S<2>, , 
PIN, I1, I, syn271, , 
PIN, I0, I, syn266, , 
END
SYM, C4, OR3, LIBVER=2.0.0
PIN, O, O, syn271, , 
PIN, I2, I, syn268, , 
PIN, I1, I, syn261, , 
PIN, I0, I, syn273, , 
END
SYM, C5, AND2, LIBVER=2.0.0
PIN, O, O, syn261, , 
PIN, I1, I, B<0>, , 
PIN, I0, I, A<0>, , 
END
SYM, C6, AND2, LIBVER=2.0.0
PIN, O, O, syn273, , 
PIN, I1, I, CI, , 
PIN, I0, I, syn213, , 
END
SYM, C7, XOR2, LIBVER=2.0.0
PIN, O, O, syn213, , 
PIN, I1, I, A<0>, , 
PIN, I0, I, B<0>, , 
END
SYM, C8, OR2, LIBVER=2.0.0
PIN, O, O, syn266, , 
PIN, I1, I, syn280, , 
PIN, I0, I, syn268, , 
END
SYM, C9, XOR2, LIBVER=2.0.0
PIN, O, O, syn280, , 
PIN, I1, I, A<1>, , 
PIN, I0, I, B<1>, , 
END
SYM, C10, AND2, LIBVER=2.0.0
PIN, O, O, syn268, , 
PIN, I1, I, B<1>, , 
PIN, I0, I, A<1>, , 
END
SIG, A<1>, PIN=A<1>
SIG, A<0>, PIN=A<0>
SIG, B<1>, PIN=B<1>
SIG, B<0>, PIN=B<0>
SIG, CI, PIN=CI
SIG, S<2>, PIN=S<2>
SIG, S<1>, PIN=S<1>
SIG, S<0>, PIN=S<0>
EOF
